Resilient training of neural network classifiers with approximate computing techniques for hardware-optimised implementations
| dc.creator | Vitor Angelo Maria Ferreira Torres | |
| dc.creator | Frank Sill Torres | |
| dc.date.accessioned | 2025-05-21T13:22:57Z | |
| dc.date.accessioned | 2025-09-09T00:54:49Z | |
| dc.date.available | 2025-05-21T13:22:57Z | |
| dc.date.issued | 2019 | |
| dc.identifier.doi | https://doi.org/10.1049/iet-cdt.2019.0036 | |
| dc.identifier.issn | 1751-8601 | |
| dc.identifier.uri | https://hdl.handle.net/1843/82405 | |
| dc.language | eng | |
| dc.publisher | Universidade Federal de Minas Gerais | |
| dc.relation.ispartof | IET Computers and digital techniques articles | |
| dc.rights | Acesso Restrito | |
| dc.subject | Aprendizado do computador | |
| dc.subject.other | large scale unsupervised learning | |
| dc.title | Resilient training of neural network classifiers with approximate computing techniques for hardware-optimised implementations | |
| dc.type | Artigo de periódico | |
| local.citation.epage | 542 | |
| local.citation.issue | 6 | |
| local.citation.spage | 532 | |
| local.citation.volume | 13 | |
| local.description.resumo | As Machine Learning applications increase the demand for optimised implementations in both embedded and high-end processing platforms, the industry and research community have been responding with different approaches to implement these solutions. This work presents approximations to arithmetic operations and mathematical functions that, associated with a customised adaptive artificial neural networks training method, based on RMSProp, provide reliable and efficient implementations of classifiers. The proposed solution does not rely on mixed operations with higher precision or complex rounding methods that are commonly applied. The intention of this work is not to find the optimal simplifications for specific deep learning problems but to present an optimised framework that can be used as reliably as one implemented with precise operations, standard training algorithms and the same network structures and hyper-parameters. By simplifying the ‘half-precision’ floating point format and approximating exponentiation and square root operations, the authors’ work drastically reduces the field programmable gate array implementation complexity (e.g. −43 and −57% in two of the component resources). The reciprocal square root approximation is so simple it could be implemented only with combination logic. In a full software implementation for a mixed-precision platform, only two of the approximations compensate the processing overhead of precision conversions. | |
| local.publisher.country | Brasil | |
| local.publisher.department | ENG - DEPARTAMENTO DE ENGENHARIA ELETRÔNICA | |
| local.publisher.initials | UFMG | |
| local.url.externa | https://ietresearch.onlinelibrary.wiley.com/doi/abs/10.1049/iet-cdt.2019.0036 |
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