Efficient hardware implementation of the Richardson-Lucy algorithm for restoring motion-blurred image on reconfigurable digital system
| dc.creator | Oscar Anacona-Mosquera | |
| dc.creator | Janier Arias García | |
| dc.creator | Daniel M. Munoz | |
| dc.creator | Carlos H. Llanos | |
| dc.date.accessioned | 2025-03-25T14:57:16Z | |
| dc.date.accessioned | 2025-09-09T01:09:52Z | |
| dc.date.available | 2025-03-25T14:57:16Z | |
| dc.date.issued | 2016 | |
| dc.identifier.doi | 10.1109/SBCCI.2016.7724056 | |
| dc.identifier.uri | https://hdl.handle.net/1843/80897 | |
| dc.language | eng | |
| dc.publisher | Universidade Federal de Minas Gerais | |
| dc.rights | Acesso Restrito | |
| dc.subject | Processamento de imagens -- Técnicas digitais | |
| dc.subject | Engenharia elétrica | |
| dc.subject.other | Image restoration , Convolution , Mathematical model , Hardware , Computer architecture , Deconvolution , Measurement | |
| dc.subject.other | Richardson-Lucy Algorithm , Motion-Blurred Image Restoration , FPGA | |
| dc.subject.other | Hardware Implementation , Scalable , Additive Noise , Distortion , Computer Vision , Input Image , Image Size , Convolution Operation , Singular Value Decomposition , Correction Process , Peak Signal-to-noise Ratio , Point Spread Function , Image Edge , Mathematical Operations , Inversion Process , Ordered Subset Expectation Maximization , Clock Cycles , Hardware Architecture , Convolution Process , Restoration Quality , Embedded System | |
| dc.title | Efficient hardware implementation of the Richardson-Lucy algorithm for restoring motion-blurred image on reconfigurable digital system | |
| dc.type | Artigo de evento | |
| local.citation.spage | 1 | |
| local.description.resumo | This work presents the hardware implementation of the RLA (Richardson-Lucy Algorithm) for image restoration task, in which the images are blurred by relative motion between camera and the scene. In this case the RLA was implemented in an FPGA-based platform using the hardware description language VHDL, and assuming the absence of additive noise in the capturing image system. The overall architecture is scalable from 3×3 to 9×9 mask sizes for the convolution steps of the RLA. The quality evaluation of the collected images was achieved using the SR-SIM (Spectral Residual Based Similarity) metric as well as by a visual verification of the images. The synthesis results and respective testing with real images are also presented in order to give support to video applications. | |
| local.publisher.country | Brasil | |
| local.publisher.department | ENG - DEPARTAMENTO DE ENGENHARIA ELETRÔNICA | |
| local.publisher.initials | UFMG | |
| local.url.externa | https://ieeexplore.ieee.org/document/7724056 |
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