Ultra short cycle protocol for partly decentralized control applications
| dc.creator | Tomás Perpetuo Corrêa | |
| dc.creator | Luís Miguel Pinho de Almeida | |
| dc.date.accessioned | 2025-04-01T17:37:20Z | |
| dc.date.accessioned | 2025-09-09T01:21:57Z | |
| dc.date.available | 2025-04-01T17:37:20Z | |
| dc.date.issued | 2017 | |
| dc.identifier.doi | 10.1109/ETFA.2017.8247719 | |
| dc.identifier.uri | https://hdl.handle.net/1843/81195 | |
| dc.language | eng | |
| dc.publisher | Universidade Federal de Minas Gerais | |
| dc.relation.ispartof | 22nd International Conference on Emerging Technologies & Factory Automation (ETFA) | |
| dc.rights | Acesso Restrito | |
| dc.subject | Sistemas de controle digital | |
| dc.subject | Controle automático | |
| dc.subject.other | Protocols , Delays , Capacitors , Modular multilevel converters , Clocks , Voltage control , Receivers | |
| dc.subject.other | Modular Multilevel Converter , Real-Time Ethernet Protocol , Partly Decentralized Control | |
| dc.subject.other | Decentralized Control , Cycle Time , Electric Power System , Multilevel Converter , Modular Multilevel Converter , Ring Topology , Shorter Cycle Time , Center For Control , Local Control , Upper Arm , Network Operators , Power Electronics , Voltage Levels , Physical Layer , Switching Function , High Voltage Direct Current , Lower Arm , Capacitor Bank , Master Node | |
| dc.title | Ultra short cycle protocol for partly decentralized control applications | |
| dc.type | Artigo de evento | |
| local.description.resumo | This paper presents a time-triggered protocol designed for decentralized control applications that use Ethernet line or ring networks. The protocol was developed based on the requirements of Modular Multilevel Converters currently used in electric power systems. It reduces the nodes forwarding delay and cycle time to a minimum by exploring the combination of a global set-point dissemination with distributed local adjustments. We have validated the overall concept with an OMNeT++ model and tested the forwarding implementation using a Field Programmable Gate Array. A comparison with EtherCAT, Profinet IRT and VABs shows that the proposed protocol has shorter cycle times. | |
| local.publisher.country | Brasil | |
| local.publisher.department | ENG - DEPARTAMENTO DE ENGENHARIA ELETRÔNICA | |
| local.publisher.initials | UFMG | |
| local.url.externa | https://ieeexplore.ieee.org/document/8247719 |
Arquivos
Licença do pacote
1 - 1 de 1