Projeto de um conversor analógico/digital por aproximações sucessivas de 12 bits

Abstract

This work presents the project of a 12-bit successive approximation analog-to-digital converter (SAR ADC). The mixed-signal development stages use a specific methodology that starts with the design of high abstraction level models and ends with the design of an integrated circuit (IC). The stages are fulfilled with the help of tools such as Stateflow,Simscape, SystemC/SystemC-AMS and Cadence Design Framework II. The converter development comes from the increasing demand for mixed-signal subsystems integrated into a SoC (System on Chip).