Communication network latency compensation in modular multilevel converters
| dc.creator | Tomás Perpetuo Corrêa | |
| dc.creator | Emilio Jose Bueno Peña | |
| dc.creator | Francisco Javier Rodriguez Sanchez | |
| dc.date.accessioned | 2025-03-31T14:34:40Z | |
| dc.date.accessioned | 2025-09-09T00:35:34Z | |
| dc.date.available | 2025-03-31T14:34:40Z | |
| dc.date.issued | 2017 | |
| dc.identifier.doi | 10.1109/ECCE.2017.8095766 | |
| dc.identifier.uri | https://hdl.handle.net/1843/81114 | |
| dc.language | eng | |
| dc.publisher | Universidade Federal de Minas Gerais | |
| dc.relation.ispartof | IEEE Energy Conversion Congress and Exposition (ECCE) | |
| dc.rights | Acesso Restrito | |
| dc.subject | Conversores eletrônicos | |
| dc.subject | Redes de computadores -- Protocolos | |
| dc.subject.other | Delays , Mathematical model , Modular multilevel converters , Protocols , Stability analysis , Hardware , Payloads | |
| dc.subject.other | Modular multilevel converter , model-based prediction , networked control system | |
| dc.subject.other | Communication Network , Multilevel Converter , Modular Multilevel Converter , Simulation Results , Dynamic Performance , Longer Latency , Flexibility In The Choice , Choice Of Protocol , High Voltage , Sampling Period , Optical Fiber , Center For Control , PI Controller , Load Current , Longer Delay , Total Delay , Phase Margin , Communication Latency , Higher Voltage Levels , Plant Input | |
| dc.title | Communication network latency compensation in modular multilevel converters | |
| dc.type | Artigo de evento | |
| local.description.resumo | The high number of cells employed in a Modular Multilevel Converter represents a challenge for the control hardware. Some authors have proposed the use of digital communications to simplify the assemblage and maintenance in such converters, but the latency they add has undesirable consequences for the closed-loop performance. In this paper, we propose a model-based compensation of the latency that is able, on one hand, to allow longer network latencies, so the designers have more flexibility in the choice of the protocol; or, on the other hand, to enable a better controller dynamic performance by the use of a higher sampling rate and gains. Simulation results are shown to demonstrate the effectiveness of the proposed approach. | |
| local.publisher.country | Brasil | |
| local.publisher.department | ENG - DEPARTAMENTO DE ENGENHARIA ELETRÔNICA | |
| local.publisher.initials | UFMG | |
| local.url.externa | https://ieeexplore.ieee.org/document/8095766 |
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