Scalable design for field-coupled nanocomputing circuits

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dc.creatorMarcel Walter
dc.creatorRobert Wille
dc.creatorFrank Sill Torres
dc.creatorDaniel Große
dc.creatorRolf Drechsler
dc.date.accessioned2025-05-07T14:42:17Z
dc.date.accessioned2025-09-09T00:49:40Z
dc.date.available2025-05-07T14:42:17Z
dc.date.issued2019
dc.identifier.urihttps://hdl.handle.net/1843/82091
dc.languageeng
dc.publisherUniversidade Federal de Minas Gerais
dc.relation.ispartof24th Asia and South Pacific Design Automation Conference (ASPDAC 2019)
dc.rightsAcesso Restrito
dc.subjectNanotecnologia
dc.subject.otherQuantum-Dot Celular Automata
dc.subject.otherField-Coupled Nanocomputing
dc.titleScalable design for field-coupled nanocomputing circuits
dc.typeArtigo de evento
local.citation.spage197
local.description.resumoField-coupled Nanocomputing (FCN) technologies are considered as a solution to overcome physical boundaries of conventional CMOS approaches. But despite ground breaking advances regarding their physical implementation as e.g. Quantum-dot Cellular Automata (QCA), Nanomagnet Logic (NML), and many more, there is an unsettling lack of methods for large-scale design automation of FCN circuits. In fact, design automation for this class of technologies still is in its infancy - heavily relying either on manual labor or automatic methods which are applicable for rather small functionality only. This work presents a design method which - for the first time - allows for the scalable design of FCN circuits that satisfy dedicated constraints of these technologies. The proposed scheme is capable of handling around 40000 gates within seconds while the current state-of-the-art takes hours to handle around 20 gates. This is confirmed by experimental results on the layout level for various established benchmarks libraries.
local.publisher.countryBrasil
local.publisher.departmentENG - DEPARTAMENTO DE ENGENHARIA ELETRÔNICA
local.publisher.initialsUFMG
local.url.externahttps://dl.acm.org/doi/10.1145/3287624.3287705

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