Design of 10 mA CMOS current driver arrays for MEMS actuators

Abstract

Current drivers are fundamental electronic components that enable precise, accurate, and adjustable current control and supply to other circuits. These circuits provide an interface between the digital world and physical systems, which are inherently analog. An example of application in this context is adaptive optics technology, whose goal is to obtain sharp images of celestial bodies through a telescope and its control circuit. This type of system consists of a set of mechanical actuators responsible for controlling and adjusting the position of MEMS mirrors in order to correct atmospheric distortions in the images. By controlling the current flowing through the mechanical actuator, the mirrors’ position can be adjusted. The focus of this master’s thesis is the design of current drivers for such a system. This dissertation addresses two generations of integrated current drivers. Both topologies are designed to deliver output currents up to ±10 mA using 0.35 μm CMOS technology. The digital word, composed of 11 bits for version 1 and 10 bits for version 2, is sent into the driver through a serial-to-parallel interface circuit (SPI). The first version is composed, in a simplified way, of a voltage digital-to-analog converter (DAC) and a voltage-to-current converter, both operating with a supply voltage of ±3.3 V. The second version is composed of a segmented current DAC, with the goals of: (i) increasing the scalability of the number of drivers on the same silicon die, (ii) improving the linearity specifications of the output current versus input digital data relationship, more specifically INL and DNL, and (iii) reducing the supply voltage. This second version was planned and designed for the simultaneous operation of 40–50 drivers, integrated in a silicon area of 20 mm2. Post-layout simulations indicate a nominal power consumption of 17.6 mW, and the linearity analysis based on 1,000-point Monte Carlo simulations (including process and mismatch variations) resulted in a mean worst-case INL of 0.57 LSB and a mean worst-case DNL of 0.27 LSB.